+852 2918 5704david.dai@bernsteinsg.com +85221232632juho.hwang@bernsteinsg.com +85221232683jack.lin@bernsteinsg.com Advantest: From GPU to CPO, CPU, LPU... Upgrading toOutperform and Top Pick We upgrade Advantest to Outperform as a fleetof newgrowthdrivers are emerging.For Nvidia, while demandfor GPU testing remains strong, we see Advantest benefiting fromthe expanded product lines of Nvidia with increased test complexity. Advantest is a majortestprovider for silicon photonics (CPO/NPO), especially for PIC wafer testing with FormFactor(FORM.US,not covered).TheVera CPU demand is aboutto surge withagentic Aland webelieve it's tested exclusively by Advantest ATE.Finally, the Groq LPU chip that's recentlyadded to the Nvidia family, while small this year, will add to the tester demand next year as weexpect it to be widely adopted for inferencing. Meanwhile,ASiCacceleratortesterdemandgotstronger.With Google/Amazonsellingmore chips to Anthropic/Meta etc,theiracceleratorunit shipmentexpectations,andhencethe associatedtesterdemand,is surging.Weforecast Advantest EXA Scaletester shipmentto2,000units in 2026 (was 1,770),growing61%YoY.We expect Advantesttogrow its SoCtester revenueby 39%,vs.consensus of 36%.InFY28/3,we see further growth to 2,350units,thanksto the ongoing demand for new chips mentioned above.Dieleveltestingand China GPUtestingpresent furtherupside,while shareloss to Teradyne seemsmanageablegiventhenewgrowthdrivers.Ourlatest Testermodelcanbedownloadedhere. UpgradingtoOutperformandTopPick.WeraiseAdvantest4QOPto¥145.5bn(vs¥131.2bn prior)and expect them to beat in theupcoming earnings.FY27/3 and 28/3OPisraisedto¥726bnand¥856bn,whichis12%and8%aboveconsensus.PTsetto¥34,300on 40x (unchanged) Q5-8 EPS. With 27% upside as of 14 April, this replaces Kokusai as44%MTD.Nearterm catalystforAdvantest is earnings beat,a strongguidance,andmoredownloadedhere. InvestmentImplications WerateAdvantest(TP=¥34,300)Outperform. challenges,additional upside in ASICs / CPO/ CPUs and die level testing. We believe the additional upside combined with therecent correction provides an attractive entry point. With increasing chip complexity in GPU accelerators,yield becomes a bigger challenge.News reports suggest a potential delay in Nvidia Rubin,as well as Rubin ultra staying on 2-die configuration rather than previously expected 4-die, both likely due toyield constraints. Advantest also alluded to the fact that customers are unable to know how much testing would be required inadvance,until they observe actual yield-back when Blackwell was ramping,we saw significant step-function jump in testerdemand due to the unpredictable nature of yield and the testing intensity required. as well as more complexproduct lines withmore peripherals-such as integration of silicon photonics, or LPUs (LanguageProcessing Units) from Rubin among other changes -will drive further increase in testing complexityfor a single xPU tofunction. In the longerterm,testing complexity should increase with advanced packaging. Key structural drivers are: 1.transistor countgrowth(~5x in5yearsper Advantesttechbriefing); 2.test optimization plateau-DFT compressiongains haveflattened,so testassembly;4.moreadvanced packaging (CoWoS, SolC and photonics)adds interconnect testing between dies, resulting in moretest insertions. Silicon Photonics tobring additionaltesterdemand for AdvantestCo-Packaged Optics (CPO)introducesa structurallynewlayer oftest complexity,and Advantestis alreadypositioned with a response.CPO integrates a Photonic IC (PIC)andan Electronic IC (EIC)into a single 3D-stackedoptical engineusingTSMC'sCOUPE (SolC-X) process (Exhibit 1), replacing pluggable optical transceivers with an on-package optical interconnect. Thelarge-scale shipmentof CPOs is expectedto commencein2028 (Exhibit 2). We believe Advantest plays a critical role in PIC testing among other test insertions for CPO (Exhibit 3).CPO testing includes1) PIC wafer test, 2) EIC wafer test, 3) Post-bonding double-sided wafer test, 4) OE package test, 5) SLT (System level test).Advantest plays an important role in the first three steps. To test the optical signal of PIC,a special handler with active alignment has to be used for optical probing. The handler ("Triton")isprovided by FormFactor(FORM.US,not covered),theactivealignmentdone through its acquisition ofKeystonePhotonics,andtheATEisAdvantestV93OOOEXAScale,withJenoptik(JEN.GY,notcovered)providingtheUFOprobecard.FormFactorand Advantest formed a partnership with High-Throughput Wafer Testing for Silicon Photonics with TRITON (Exhibit 4). Webelieve that suppliers of PIC wafers,e.g.GlobalFoundries,are expandingtest capacityrapidly with Advantesttesters for PiCwafer sort.In addition,we believe Advantest can play importantroles in EiC wafertest,and possiblyoptical enginepackage testtoo. Besides Advantest and FormFactor, other noteworthy companies in CPO testing include: ficonTEC (300757.CH, not covered)and MPI (6223.TW, not covered) prov