您的浏览器禁用了JavaScript(一种计算机语言,用以实现您与网页的交互),请解除该禁用,或者联系我们。 [IBM]:SI-GT:基于图形变换器的集成电路设计快速互连信号完整性分析 - 发现报告

SI-GT:基于图形变换器的集成电路设计快速互连信号完整性分析

电子设备 2026-04-23 IBM 艳阳天Cathy
报告封面

Yuting Hu1Tarek Mohamed2Chenhui Xu1Hua Xiang3Hussam AmrouchGi-Joon Nam3Jinjun Xiong1∗1University at Buffalo, Buffalo, NY, USA2University of Stuttgart, Stuttgart, Germany3IBM Research, Yorktown Heights, NY, USAABSTRACT Signal integrity issues present significant challenges in modern integrated circuit(IC) design, as crosstalk-induced delay variation and transient glitches caused bycapacitive coupling among interconnects can severely impact IC functional cor-rectness. Although circuit simulators like SPICE can deliver accurate signal in-tegrity analysis, their computational cost becomes prohibitive for large-scale de-signs. In this paper, we propose Si-GT, a novel transformer-based model for fastand accurate signal integrity analysis in IC interconnects. Our model elaboratesthree key designs: (1) virtual NET token to encode net-specific signal character-istics and serve as net-wise representation, (2) mesh pattern encoding to embedhigh-order mesh structures at each node while distinguishing uncoupled wire seg-ments, and (3) intra-inter net (IIN) attention mechanism to capture structures ofsignal propagation path and coupling connections. To support model training andevaluation, we construct the first interconnect signal integrity dataset comprising200k delay examples and 187k glitch examples using SPICE simulations as the 1INTRODUCTION Signal integrity (SI) analysis is essential in integrated circuit (IC) design to ensure reliable signaltransmission and correct timing behavior (Caignet et al., 2001). Among signal integrity problems,crosstalk is the primary culprit.Dense interconnect layouts and high-speed signaling in modernICs exacerbate crosstalk-induced noise and delay variations, leading to potential functional errors,performance degradation, and even chip failure Li et al. (2022); Song et al. (2015). Engineers have torun SPICE simulations (Quarles et al., 1994) repeatedly throughout IC design flow to identify circuitbehavior and crosstalk-induced noise and delay violations, allowing careful crosstalk mitigations Recently, machine learning (ML) has emerged as a computationally efficient surrogate for signalintegrity analysis in IC design (Kahng et al., 2015; Lu & Lim, 2022; Swaminathan et al., 2020;Wang & Luo, 2019; Cheng et al., 2020; Liang et al., 2022; Liu et al., 2025). However, most priorefforts primarily concentrate on timing prediction, aiming to “unravel the mystery” of black-boxtiming estimation formulas in sign-off timers. These works generally do not model crosstalk effects Advances in graph neural networks (GNNs) (Wu et al., 2020) and graph transformer (GT) (Dwivedi& Bresson, 2020) have revolutionized machine learning capabilities for graph-structured data, en-abling breakthrough applications in electronic design automation (EDA) from precise timing (Guoet al., 2022; Hu et al., 2023; Lin et al., 2025; Zhong et al., 2024; Guo et al., 2025) and parasiticsprediction (Ren et al., 2020; Shahane et al., 2023; Yoon et al., 2025; Liu et al., 2023) to complexoptimization tasks like placement (Lu et al., 2020; Ding et al., 2024; Hou et al., 2025) and routing(Cheng & Yan, 2021; Liao et al., 2020; Wang et al., 2024). However, developing a graph learn-ing model for signal integrity analysis is challenging due to the complex crosstalk effect (Aragones& Rubio, 2003). In IC interconnects, the crosstalk effect arises from electromagnetic interferencebetween signals propagating on adjacent wires. On the one hand, the severity and nature of thisinterference depend on multiple factors, including switching directions, active/quiet net states, slewrate, coupling capacitance, and wire characteristics (Wong et al., 2000; You & Soma, 1990). Onthe other hand, the crosstalk effect exhibits both long-range dependencies (i.e., signal propagating Graph transformers are excellent at capturing long-range dependencies through self-attention mech-anisms. To this end, we propose Si-GT, a novel graph transformer model for IC interconnect signalintegrity analysis. Si-GT incorporates three key designs: (1) Mesh pattern encoding, which embedslocal mesh structures at each node to enrich node features and separate uncoupled nets; (2) Virtualtokens, which encode net-specific signal characteristics (e.g., switching direction and slewrate) and serve as net-level representations, with their receptive fields restricted to the corresponding • We propose Si-GT, a Transformer-based model for fast interconnect signal integrity anal-ysis. To enhance graph inductive bias, Si-GT leverages virtual NET tokens for net-levelsignal encoding, mesh pattern encoding for local coupling structures, and intra-inter net attention to capture signal propagation and coupling effects.• We construct a dataset for ML-based signal integrity analysis of IC circuits, comprising200,200 crosstalk delay examples and 187,309 crosstalk glitch examples referring to golden SPICE simulations. To the best of our knowledge, this is the first large-scale dataset