您的浏览器禁用了JavaScript(一种计算机语言,用以实现您与网页的交互),请解除该禁用,或者联系我们。 [伯恩斯坦]:全球半导体:英特尔能否凭借EMIB-T技术挑战台积电?供应链中谁将受益? - 发现报告

全球半导体:英特尔能否凭借EMIB-T技术挑战台积电?供应链中谁将受益?

电子设备 2026-02-03 - 伯恩斯坦 高杨
报告封面

Global Semis: Can Intel challenge TSMC with EMiB-T? And whobenefits in the supply chain? an alternativeto TSMC's CoWoS,which is currently the defactopackaging method forAl chips.Reportedly, Google-MediaTek is considering it for its 2027 TPU, and Meta isconsidering it for its MTIA accelerators (link). We explore the EMIB-T and evaluate the prosand cons comparedto CoWoStoassess the likelihood oftheshift. +8522918 5704david.dai@bernsteinsg.com +852 21232645mark.li@bernsteinsg.com whichhas been usedby Intel internallyfor years, but modified to haveTSVin the substrate&siliconbridges inserted inthe substrateforAIGPU/ASICpackaging.EMIB-Tis betterpositioned to supportlargerreticlesize:whileCoWoS-S can support~3.3x and CoWoS-Lcan extend to5.5x&9.5xlater,Intelclaimed EMIBalreadysupported6x in2024 and aimstoscale thatto 8-12xby2026-2027.By eliminatingtheunusedarea ofa round wafer asproduction carrier, EMIB promises a more cost-effective solutionfor Alcustomers requiringvery large packages. Another benefit is that EMIB-T packaging can be done by Intel in theUS,pairing up with TSMC's front-end fabs in the US to keep the entire production in the USHowever,themainweakness,inourview,isthelackofproventrackrecord,andpossiblylowerproductionyieldduetothedifficultyofembeddingsiliconbridges inthesubstrateastwodifferentmaterialsaredifficultofintegrate.WebelieveMediaTekisassessingEMlBinparallel withCoWoSforpossibleproductionlate2027&morein2028,aswell as othercustomerssuchasBroadcomandMarvell. +12135595917stacy.rasgon@bernsteinsg.com +85221232683jack.in@bernsteinsg.com +85221232632juho.hwang@bernsteinsg.com +442077621857carmine.milano@bernsteinsg.com Edward Hou, CFA+852 21232623edward.hou@bernsteinsg.com up to a billion dollars. The ASP varies a lot depending on chip size and packaging, butweestimate theASPfor EMIBpackagingtobeafewhundred$,cheaperthan CoWoSwhich is $900-1,000, for a Rubin-equivalent chip.If 1 million chips shift from CoWoS toEMIB-T,theimpactto TSMCcould be close to$1bn,or~5-10%ofTSMC'sadvancedother customers step in &use the capacityreleased.Conversely,the upsidetoIntelwith1mn chips would be high-triple digit mns $, or 1-2% of Intel's revenue. We note that Intelhas suggested early customer engagement potentially worth"north of a billion dollars" each(though the jury remains out); for the record we currently model ~$1bn in external foundryrevenue (mostlypackaging) in2027forthe companyalready. Yipin Cai, CFA+85221232669yipin.cai@bernsteinsg.com Alrick Shaw+1 917 344 8454alrick.shaw@bernsteinsg.com Arpad von Nemes+19173448461arpad.vonnemes@bernsteinsg.com Ibiden (Outperform) is a better way to play EMIB-T, in our view. With EMIB-T, thecomplexity of packaging shifts from interposer to substrate, hence adds value to Ibidenin higher ASP (more than 50+% higher) and margins. We expect EMIB-T substrate valueto rise to ~$300 or more, significantly higher vs. Blackwell substrate ($80-100) or Rubin($180-200). On our estimates, every 1mn chip shifted from CoWoS (TSMC) to EMIB-T (Intel)means~8%additional revenue to Ibiden inFY28/3E andmore than10%0P,making ita better candidate to play the shift, in our view. While Ibiden's Nvidia story is well known,we expect the ramp up of Rubin, share gain in ASIC, and EMIB-T to be major catalysts forupside. TSMC: We rate TSMC Outperform, with PT = NT$1,800.00.MediaTek:We rate MediaTek Outperform, with PT =NT$1,640.00.INTc (MP, $36): Intel's problems have broken through to the forefront. On therecent Intelearning call,management said advancedpackaging revenue opportunities could be"hundreds of millions of dollars"to even"billions"What is the advanced packaging that Intel is referring to and could it deliver such results? CoWoS, which is currently the de facto packaging methodfor Alchips.Reportedly, Google-MediaTek is considering it for its2027TPUv9 (some also callit v8E), and Meta is considering itfor its MTIAaccelerators (link). If this happens, we could see Alchips madeusingTSMC front end and Intel EMIB-Tbackend packaging. New Mexico (Fab 9/11x),and Malaysia.The companyalso establishedtheprocess at Amkor's SongdoK5facility in SouthKorea, and in the upcoming Arizona fab in the future-its first ever move to outsource such high-end packaging,presumablyupon client request,based on reports. Having both chip front end production and backend packaging both on the US soil isanother compelling offering from Intel EMIB-T. EMIB-Tis an enhancedversion of EMIB packagingtechnologydevelopedbyIntel and hasbeenused bythe companyfor its high-endprocessors since2017.Thenext-generation EMIB-Ttechnology integrates through-siliconvias (TSVs)into substrate& the silicon bridges inside the substrate, enabling direct power delivery fromthe package baseto logic &memory diessitting on the top ofthe substrate. This advancement improves power efficiency,supports high-speed die-to-die connectivity,and significantly boosts bandwidth,&as the result positions EMiB-T as a viable solutionfor high-performan