中国半导体：华为的逻辑折叠技术，一个被低估的突破

China Semis: Huawei's LogicFolding, an underestimatedbreakthrough about the implications in our previousreport.One of thekey tech enabler in the Tau LawiscalledLogicFolding,whichisusedto improvechipperformancethroughstackingRecentmarketfeedbackremains skeptical, buttheskepticismappearstounderappreciatehow different LogicFolding is from existing 3DIC packaging solutions that is alreadycommercialized.Webelieveit couldbeone of themost important breakthroughsin China semis that is underestimated.This report explains how is the approach istechnically differentiated, and why it is impressive. +85221232654qingyuan.lin@bernsteinsg.com +85221232626francis.ma@bernsteinsg.com tosolvetheoverheatissueafterstacking. TSMC SolC, Intel Foveros Direct, or Samsung 3D Cube.However, if that is the case,thenjust like these solutions, stacking can easily increase transistor density, but putting two diesand therefore fail to deliver practical performance gains (actually it will usually lead tolower clock frequency due to overheat). However, spec from Huawei's Kirin 2026 chipshowed opposite results: 41% power efficiency gain and 13%frequency improvement.The advance is notmerely more transistors perfootprint; it is a simultaneous improvementin density,energy efficiency,and frequency that justify itself as the next generation process. So what is the real differentiation? The key technology breakthrough is, LogicFoldingbreaks down one functional logic circuits that was originally designed in one die, anddistributes that across two vertically stacked waferlayers atthe design stage, which is(usually logic + SRAM). Why is that important? Because only through this new design,the packaging can reducethe power consumption and increase the frequency.To understandhow it works, let'stakea step back and think about how logic circuits functions. If we keep it oversimplified, thenyou can think of the operation of a chip that is basically two parts, the transistors and theinterconnectsbetween thetransistors.Therefore,powerconsumptionandlatencyarejust the aggregated sum of these two parts. Without node migration, obviously Huaweicannot make any improvement on thetransistor level, however they can use the packagingtoreducethepowerconsumptionandlatencyforinterconnects.Forthetraditional2Ddesign,if two transistors arefar away from each other,then talkingto eachother needif you use packaging to stack the two transistors on top of each other, the interconnectdistance will be much shorter and therefore significantly reducing the power consumptionwhich is not yet fully optimized according to their disclosure and thus further improvementcouldbe achieved in nextgenerations. as interchangeable with conventional 3DiC solutions.These othersolutions can solve thecritical to achieve these results.Thebarrier is therefore not only packaging capability, butalsodesign methodology,softwaretooling,and architecture-level co-development.This is exactly the reason whyI callthe Tau's law another DeepSeek moment. Just like DeepSeek, they are forced to innovate on infrastructure as they are constrained oncompute power, which helped to reduce the inferencing cost by an order of magnitude.Inthis case, Huawei is constrained on lithography, but that indeed forced them to innovate onpackaging, which is also very critical for the development of China Semis. before reaching product commercialization. But the reality is Huawei plans the firstcommercial LogicFolding implementation inaKirin smartphoneprocessorscheduledfor fall 2026, which is very likely the next Mate series. So it's not years away, it's justmonthsaway.IfHuaweidoesn'thavethechipalreadyinvolumeproduction,itishardforus to imaging why they would say this is coming out in next mobile phone. So this techbreakthrough is not just a concept, but already at delivery stage. Additionally,some may also concern that if the packaging yield is low, then the costof chipwill be so high that it can't really be commercially successful. But we are impressed tosee that Huawei claimed thatthey can achieve ~100% yield through smart redundancy,implying Huawei is alreadyaddressing one of the key cost and manufacturabilityobjectionssupportingfacts inthenextfewmonths afterproductlaunch,aschipperformancebenchmark data and teardown evidence shouldbe able to validatewhethertheperformance claims and design novelty are real. Market should re-rate when that happens. Skepticismthree:Global playerscaneasilycopythat limiting Huawei's long-term advantage.That argument overlooks the complexity ofthis end-to-end optimization ofEDA/design/manufacturing.Most globalfabless likelywon't be willing to adopt the technology until it's matured, but EDA vendors cannot makeimprovement if customer is not willing to use it, and foundry also cannot further optimizetheir packaging process around it. Therefore, although technically global players cancopy this concept,the implementation will be very challenging.Note that Huawei is notthe first to reach commerci